Introduction

In high-speed chip development, change is constant. Engineers tweak RTL code every day — refining logic, improving performance, or fixing corner cases.

But for one of our customers, each small change came with a big penalty: hours, sometimes days, of full re-simulation before they could even know how that change impacted power.

The result? Decision-making slowed to a crawl. Productivity dipped. Deadlines loomed.

Challenge

The High Cost of Evaluating Small Changes. The customer’s traditional flow had two major bottlenecks:

• Lengthy Re-Simulations: Even a tiny RTL tweak — a few lines of code — meant running a complete simulation of the entire chip to produce fresh waveforms.
• Productivity Bottleneck: This repetitive, time-consuming cycle delayed critical design choices and drained engineering momentum.

It wasn’t just a technical issue — it was a morale issue. Teams dreaded making necessary changes because of the simulation cost.

Zettabolt Solution

RPA’s Intelligent Incremental Simulation: We brought in RPA – RTL Power Analyzer and rewrote the rules of incremental design analysis.

• Smart Baseline Use: RPA took the original, full-chip simulation waveforms (VCD/FSDB) as a baseline.
• Targeted Simulation: When a new RTL was provided, RPA automatically detected the changed logic blocks.
• Activity Propagation: Only the changed and impacted portions were simulated — the rest of the design used existing baseline data.

This meant designers got the same accuracy as a full run, but without paying the runtime and resource penalty.

Results

Massive Productivity and Efficiency Gains. The impact was immediate and measurable:

• Drastic Turnaround Reduction: Power impacts were now visible in minutes, not hours or days.
• Huge Productivity Boost: Engineers could confidently make and test changes multiple times in a single day.
• Significant Cost Savings: Expensive simulation license hours were freed up, and compute resources were no longer tied up in redundant runs.

The customer now uses RPA as their go-to tool for fast, accurate, and efficient power impact evaluation, keeping their design cycle in constant forward motion.