Introduction

In today’s high-performance design cycles, every iteration counts. For one of our customers, late detection of power degradation during the Place & Route (PnR) stage was slowing them down, inflating costs, and wasting precious engineering hours. Zettabolt’s GPA solution redefined their regression flow — delivering post-synthesis accuracy that was previously only possible after full PnR.

Challenge – Late Power Feedback & Costly Regression:

The customer’s regression process meant power degradation caused by RTL changes was only discovered after completing time-consuming and resource-hungry PnR runs. This had several drawbacks:

• Delayed Insight: The team was getting accurate power data only after the most expensive design stage.
• Wasted Resources: Every regression run consumed valuable PnR time, compute resources, and costly sign-off tool licenses.
• Slow Iterations: Engineers waited for full PnR results to validate power impact, making design refinement cycles sluggish and frustrating.

Zettabolt Solution – GPA’s Early & Accurate Power Closure:

We introduced GPA into their flow — a game-changing shift in their regression strategy.

• Post-Synthesis Accuracy: Using advanced correlation techniques (CTS, HFO, physical models, scaling), GPA delivered post-PnR accurate power estimates straight from a post-synthesis netlist.
• Immediate Feedback: Any RTL change causing power regression was flagged instantly at the post-synthesis stage.
• “Stop and Fix” Capability: Designers could address issues before committing to full PnR runs, reducing wasted effort.
• Cost Savings: The approach cut down on PnR runtime and eliminated unnecessary license usage, delivering significant financial efficiency.

Results– Faster Cycles, Lower Costs, Happier Engineers:

The introduction of GPA not only accelerated their regression loop but also empowered engineers to focus on innovation rather than firefighting. The result was:

• Dramatically reduced PnR runtime per iteration.
• Early detection of power degradation — avoiding costly last-stage fixes.
• Savings on expensive EDA tool licenses.
• Greater confidence in design stability before sign-off.